JPS63199340U - - Google Patents
Info
- Publication number
- JPS63199340U JPS63199340U JP8763487U JP8763487U JPS63199340U JP S63199340 U JPS63199340 U JP S63199340U JP 8763487 U JP8763487 U JP 8763487U JP 8763487 U JP8763487 U JP 8763487U JP S63199340 U JPS63199340 U JP S63199340U
- Authority
- JP
- Japan
- Prior art keywords
- bit
- adder
- full
- input
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8763487U JPS63199340U (en]) | 1987-06-05 | 1987-06-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8763487U JPS63199340U (en]) | 1987-06-05 | 1987-06-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63199340U true JPS63199340U (en]) | 1988-12-22 |
Family
ID=30945023
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8763487U Pending JPS63199340U (en]) | 1987-06-05 | 1987-06-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63199340U (en]) |
-
1987
- 1987-06-05 JP JP8763487U patent/JPS63199340U/ja active Pending
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